Boosting the Electrostatic MEMS Converter Output Power by Applying Three Effective Performance-Enhancing Techniques

This current study aims to enhance the electrostatic MEMS converter performance mainly by boosting its output power. Three different techniques are applied to accomplish such performance enhancement. Firstly, the power is boosted by scaling up the technology of the converter CMOS accompanied circuit, the power conditioning, and power controlling circuits, from 0.35 µm to 0.6 µm CMOS technology. As the converter area is in the range of mm2, there are no restrictions concerning the scaling up of the accompanied converter CMOS circuits. As a result, the maximum voltage of the system for harvesting energy, Vmax, which is the most effective system constraint that greatly affects the converter’s output power, increases from 8 V to 30 V. The output power of the designed and simulated converter based on the 0.6 µm technology increases from 2.1 mW to 4.5 mW. Secondly, the converter power increases by optimizing its technological parameters, the converter thickness and the converter finger width and length. Such optimization causes the converter output power to increase from 4.5 mW to 11.2 mW. Finally, the converter structure is optimized to maximize its finger length by using its wasted shuttle mass area which does not contribute to its capacitances and output power. The proposed structure increases the converter output power from 11.2 mW to 14.29 mW. Thus, the three applied performance enhancement techniques boosted the converter output power by 12.19 mW, which is a considerable enhancement in the converter performance. All simulations are carried out using COMSOL Multiphysics 5.4.


Introduction
Recent studies focus on developing low-power, portable, and remote devices. Such development contributes to replacing traditional energy sources with untraditional ones. Thus, it is important to harvest environmental energy because, in applications located in a non-reachable environment where maintenance costs are high, harvesting the energy from the environment becomes essential. Biomedical devices and remote area wireless sensors are some examples of applications that need energy harvesters [1][2][3][4]. Harvesting energy means converting environmental energy directly into electrical energy. Solar, thermal, vibration, and wind energy are examples of environmental energy [5][6][7][8]. Concerning the vibration energy, the MEMS harvester is normally used. It consists of a spring and a mass. It

Electrostatic MEMS Converter Spring Design
In our previous research, we built up a proposed electrostatic MEMS converter behavioral circuit model. The published model represented the converter comb drive. The proposed model illustrates the converter behavior when converting the input vibration energy into electricity [38]. A Supplementary Martial which summarizes the basic concept of the converter operation is provided. The output from the converter proposed model was the gained energy. The converter resonant frequency, which the converter spring is responsible for, was included in the calculation of the converter output power [38]. In this work, both the converter comb drive and spring design are considered. In this section, firstly, the most suitable spring configuration for the electrostatic MEMS converter operation is qualitatively determined. Then, the design of such a suitable configuration is illustrated.

The Common Geometries of MEMS Spring
In this subsection, the commonly used MEMS spring geometries are presented. A comparison between such geometries is carried out to determine the most suitable type for the in-plane gap-closing electrostatic MEMS converter operation [39].    Referring to Figure 1a, the fixed-fixed flexure spring geometry has an extensional axial stress in its beam. Thus, the spring constant of this geometry is very stiff and nonlinear. Thus, it will not support the converter motion in the required x direction [39,40]. Concerning the folded flexure, referring to Figure 1b, it has a good compromise of linear behavior to an extent in the y direction. In addition, it has an added stiffness in the x direction. Therefore, it will resist the converter motion in the x direction [39,40]. In Figure 1c, the crab leg flexure is a modified version of the fixed-fixed flexure configuration. It has an added thigh to the beam which is used to minimize the peak stress [41]. This configuration is used to reduce the extensional axial forces of the beam [40]. Moreover, the crab leg flexure offers the required symmetry which is suitable for the in-plane gap-closing converter to function [42]. The most suitable spring type for the in-plane gap-closing electrostatic MEMS converter is the crab leg flexure, as it supports the motion in the desired x direction which is the required direction of motion of the converter [39][40][41][42]. Moreover, it reduces the extensional axial stress and provides better symmetry. Thus, the converter becomes safe from fracture during its operation [39][40][41][42].

Crab Leg Spring Design
The design of the crab leg spring, which is the most suitable MEMS spring geometry for the in-plane gap-closing electrostatic MEMS converter operation, aims to adjust the converter resonant frequency to be tuned to the desired frequency of the required application [38]. In this subsection, the design of the crab leg spring is illustrated. Firstly, the main governing equations which are used to design the crab leg flexure are presented. Then, the technological parameters of such spring are analytically determined. The spring constant (k) is determined by Equation (1) [39]: where m is the shuttle mass, as given by Equation (2): where ρ (= 2.33 g/cm 3 ) is the density of poly-Si, which is the material utilized for fabricating the spring, and t is the converter thickness. A movable is the shuttle mass area and equals L m (W m + 2 L f ), L m and W m are the shuttle mass length and width, respectively, and L f is the finger length. The values of L m , W m , and L f are 1 cm, 0.3 cm, and 512 µm, respectively [38]. By using Equations (1) and (2), k is calculated to be 11.55 × 10 3 N/m. Recalling the equations of the crab leg [39], the spring constants in the x and y directions, k x , and k y , are given by Equations (3), and (4), respectively: Now, referring to Figure 1c, the spring dimensions need to be evaluated. These dimensions are beam length (L b ), thigh length (L a ), and the widths of the beam and thigh which are (W b , and W a ), respectively. L b is calculated by using the maximum spring deflection in the following equation: Z max is the maximum displacement. The values of Z max and t are 6.75 µm and 500 µm, respectively [38]. σ and n s are the fracture stress of polysilicon and safety factors and equal 7 GPa, and 1.8, respectively [43]. Substituting Equation (5), L b is evaluated to be 0.7 mm. The spring constant that is calculated using Equation (1) is assumed to be in the desired direction of motion of the in-plane gap-closing converter (k x ). Recalling Equations (3) and (4), k y must be larger than k x to avoid the converter motion in the undesired Y direction [44]. Thus, k y /k x is taken to be 500. In addition, for the homogeneity of the spring, we assume that W a = W b = W s . Combining Equations (3) and (4), L a and W s are evaluated to be 88 µm and 23 µm, respectively. All calculated parameters along with their respective definitions are summarized in Table 1.

Calibration of COMSOL MultiPhysics 5.4
In this section, the simulation of the electrostatic MEMS converter is carried out by using COMSOL Multiphysics 5.4. The simulator is calibrated by using the technological parameters of the electrostatic MEMS converter case study found in [38]. The converter performance is verified by achieving the simulation results of five main performance indicators which are electric potential and the electric field distribution, the converter fingers displacement and the stress analysis due to the input vibration signal, and the converter output power (P out ) is simulated at different input voltage (V ip ).

The Electric Potential and Electric Field Distributions
First, Figure 2a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 2b shows a part of the structure which clarifies its details. Upon simulating the structure given the appropriate boundary conditions, the electric potential distribution is demonstrated in Figure 3a,b. The voltage distribution changes from 0 V to V max , which is 8 V for the 0.35 µm design [38]. Furthermore, the electric field distribution simulation is performed to check the safe design of the converter concerning the maximum electric field that exists between the converter fingers. Figure 4a,b show the simulation results of the electric field distribution with a focus on Figure 4b, which clarifies the results. It is clear that the value of the maximum electric field is 1.16 × 10 6 V/m, which is less than half of the air breakdown electric field, which is 1.5 × 10 6 V/m [38]. This result guarantees that the converter design is safe. In this section, the simulation of the electrostatic MEMS converter is carried out by using COMSOL Multiphysics 5.4. The simulator is calibrated by using the technological parameters of the electrostatic MEMS converter case study found in [38]. The converter performance is verified by achieving the simulation results of five main performance indicators which are electric potential and the electric field distribution, the converter fingers displacement and the stress analysis due to the input vibration signal, and the converter output power (Pout) is simulated at different input voltage (Vip).

The Electric Potential and Electric Field Distributions
First, Figure 2a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 2b shows a part of the structure which clarifies its details. Upon simulating the structure given the appropriate boundary conditions, the electric potential distribution is demonstrated in Figure 3a,b. The voltage distribution changes from 0 V to Vmax, which is 8 V for the 0.35 µm design [38]. Furthermore, the electric field distribution simulation is performed to check the safe design of the converter concerning the maximum electric field that exists between the converter fingers. Figure 4a,b show the simulation results of the electric field distribution with a focus on Figure 4b, which clarifies the results. It is clear that the value of the maximum electric field is 1.16 × 10 6 V/m, which is less than half of the air breakdown electric field, which is 1.5 × 10 6 V/m [38]. This result guarantees that the converter design is safe.

The Converter Displacement due to the Input Vibration Signal
In this subsection, the input vibration signal of the vibration source is applied to the converter. Thus, the maximum displacement of the converter can be measured. As shown in Figure 5a, the nominal gap between converter fingers at rest position (dnom), at which the minimum capacitance of the converter occurs, is 7 µm. Additionally, the minimum distance (dmin) at which the maximum capacitance of the converter occurs is 0.25 µm. Thus, the maximum displacement of the converter fingers must be dnom-dmin = 6.75 µm. Figure 5b shows the simulation results of the converter's maximum displacement. It is equal to 6.75 µm, which quantitatively verifies the analytically calculated value based on Figure 5a. This value satisfies the proper operation of the converter.

The Converter Displacement Due to the Input Vibration Signal
In this subsection, the input vibration signal of the vibration source is applied to the converter. Thus, the maximum displacement of the converter can be measured. As shown in Figure 5a, the nominal gap between converter fingers at rest position (d nom ), at which the minimum capacitance of the converter occurs, is 7 µm. Additionally, the minimum distance (d min ) at which the maximum capacitance of the converter occurs is 0.25 µm. Thus, the maximum displacement of the converter fingers must be d nom -d min = 6.75 µm. Figure 5b shows the simulation results of the converter's maximum displacement. It is equal to 6.75 µm, which quantitatively verifies the analytically calculated value based on Figure 5a. This value satisfies the proper operation of the converter.

The Stress Analysis for the Converter Due to the Input Vibration Signal
In this subsection, stress analysis for the converter due to the input vibration signal is investigated. Such simulation is important to guarantee that the design is safe against fracture. Figure 6 shows the simulation results of the converter stress. It is obvious that the maximum stress is 3.67 × 10 8 N/m 2 , which is 0.367 Gpa. This value is smaller than the fracture stress of the polysilicon, which is 7 GPa [43]. Thus, the design is safe against fracture.

The Stress Analysis for the Converter due to the Input Vibration Signal
In this subsection, stress analysis for the converter due to the input vibration signal is investigated. Such simulation is important to guarantee that the design is safe against fracture. Figure 6 shows the simulation results of the converter stress. It is obvious that the maximum stress is 3.67 × 10 8 N/m 2 , which is 0.367 Gpa. This value is smaller than the fracture stress of the polysilicon, which is 7 GPa [43]. Thus, the design is safe against fracture. Figure 6. The converter stress analysis is due to the input vibration signal.

The Converter Outputs Power at Different Vip
In this subsection, the converter output power (Pout) is simulated by sweeping the input voltage (Vip). The output power Pout is directly proportional to the square of Vip, as indicated in Ref. [38]. Therefore, the maximum value of Pout (Poutmax) has to occur at Vip equal to the maximum voltage of the system, which is 8 V for the used case study. Additionally, Pout is expected to increase with the increase in Vip. Figure 7 shows the simulation results of Pout vs. Vip for sweeping Vip from 0 V to 14 V. It is obvious that the maximum value of Pout, which is 2.1 mW, occurs at Vmax, which is 8 V, which is in agreement with the gained value from the converter model and the analytically calculated values, Figure 6. The converter stress analysis is due to the input vibration signal.

The Converter Outputs Power at Different V ip
In this subsection, the converter output power (P out ) is simulated by sweeping the input voltage (V ip ). The output power P out is directly proportional to the square of V ip , as indicated in Ref. [38]. Therefore, the maximum value of P out (P outmax ) has to occur at V ip equal to the maximum voltage of the system, which is 8 V for the used case study. Additionally, P out is expected to increase with the increase in V ip . Figure 7 shows the simulation results of P out vs. V ip for sweeping V ip from 0 V to 14 V. It is obvious that the maximum value of P out , which is 2.1 mW, occurs at V max , which is 8 V, which is in agreement with the gained value from the converter model and the analytically calculated values, which were 2.2 mW and 2.3 mW, respectively [38]. Based on the previous calculations and results, the COMSOL tool is calibrated to be used for optimizing the electrostatic MEMS converter structure to enhance its performance. which were 2.2 mW and 2.3 mW, respectively [38]. Based on the previous calculations and results, the COMSOL tool is calibrated to be used for optimizing the electrostatic MEMS converter structure to enhance its performance.

Qualitative Analysis of the Three Performance-Enhancing Techniques
In this section, the performance enhancement of the converter is investigated to boost its output power. Three effective performance enhancement techniques are applied to achieve such an objective. Firstly, the converter output power is boosted by scaling up the technology of the converter CMOS circuit, the power conditioning, and power control circuits, from 0.35 µm to 0.6 µm CMOS technology. Secondly, the converter output power increases by optimizing its technological parameters, namely the converter thickness and converter finger width and length. Finally, the converter structure is optimized to maximize its finger length.
Concerning the first technique, the technology of the converter circuit is scaled up from 0.35 µm to 0.6 µm CMOS technology. Such scaling up has the following advantages. Firstly, it increases the main effective system constraint, Vmax. As the converter output power is directly proportional to the square of Vmax [38]; so, scaling up the technology is expected to effectively enhance the converter output power. Moreover, when Vmax increases, the nominal distance (dnom) between the converters' fingers increases, resulting in decreasing the number of fingers. Additionally, the aspect ratio (AR) of the deep reactive ion etching (DRIE) fabrication process decreases. Thus, the converter fabrication cost decreases.
To qualitatively calculate the maximum voltage (Vmax) of 0.6 µm CMOS technology, its breakdown voltage (VBD) must be specified. From the 0.6 µm CMOS technology file [45], VBD is 62 V. For a safe design of the power switches found in the system power condition circuit, Vmax is assumed to be approximately equal to half of VBD [38]; thus, Vmax is assumed to equal 30 V. Based on the value of Vmax, the nominal distance between the converter fingers (dnom.) must be calculated to satisfy the safe design. The nominal distance is determined using Equation (6):

Qualitative Analysis of the Three Performance-Enhancing Techniques
In this section, the performance enhancement of the converter is investigated to boost its output power. Three effective performance enhancement techniques are applied to achieve such an objective. Firstly, the converter output power is boosted by scaling up the technology of the converter CMOS circuit, the power conditioning, and power control circuits, from 0.35 µm to 0.6 µm CMOS technology. Secondly, the converter output power increases by optimizing its technological parameters, namely the converter thickness and converter finger width and length. Finally, the converter structure is optimized to maximize its finger length.
Concerning the first technique, the technology of the converter circuit is scaled up from 0.35 µm to 0.6 µm CMOS technology. Such scaling up has the following advantages. Firstly, it increases the main effective system constraint, V max . As the converter output power is directly proportional to the square of V max [38]; so, scaling up the technology is expected to effectively enhance the converter output power. Moreover, when V max increases, the nominal distance (d nom ) between the converters' fingers increases, resulting in decreasing the number of fingers. Additionally, the aspect ratio (AR) of the deep reactive ion etching (DRIE) fabrication process decreases. Thus, the converter fabrication cost decreases.
To qualitatively calculate the maximum voltage (V max ) of 0.6 µm CMOS technology, its breakdown voltage (V BD ) must be specified. From the 0.6 µm CMOS technology file [45], V BD is 62 V. For a safe design of the power switches found in the system power condition circuit, V max is assumed to be approximately equal to half of V BD [38]; thus, V max is assumed to equal 30 V. Based on the value of V max , the nominal distance between the converter fingers (d nom. ) must be calculated to satisfy the safe design. The nominal distance is determined using Equation (6): E max is the maximum electric field that occurs between the converter fingers. For a safe design, it is assumed to be half of the breakdown field of air. Thus, E equals 1.5 × 10 6 V/m [46], from which d nom is calculated to be 20 µm.
The second applied performance enhancement technique is the optimization of the converter technological parameters which are the finger length (L f ), finger width (W f ), and the converter thickness (t). Equations (7)-(9) represent the converter number of fingers (N g ), maximum capacitance (C max ), and minimum capacitance (C min ).
Based on the above equations, to increase P out , the converter capacitances must increase [38]. To increase the capacitances the converter finger length and thickness, the number of fingers must increase. Concerning the finger width, using Equation (7) to increase the number of fingers, the finger width must decrease. In the optimization of converter technological parameters there are essential technological limitations and restrictions. Such limitations affect the optimum values of each technological parameter. In the Section 5, these limitations will be illustrated.
The third applied performance enhancement technique is the optimization of the converter structure. Such optimization aims to overcome the converter wasted shuttle mass area, which will be illustrated in the coming sections.

Enhancing the Converter Performance Using COMSOL Simulations
In this section, the electrostatic MEMS converter performance based on the three applied enhancement techniques is simulated using COMSOL Multiphysics 5.4.

Scaling Up the Technology
As mentioned herein, the converter out power becomes 4.5 mW when scaling up to 0.6 µm CMOS technology. This value is double the output power in the case of 0.35 µm CMOS technology, which was 2.1 mW. The converter performance based on the technology scaling is simulated to ensure the proper operation of the converter under investigation. The electric potential and the electric field distributions, the converter displacement, and the stress analysis due to the input vibration signal, and the converter output power at different V ip is simulated. Figure 8a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 8b shows a part of the structure which clarifies its details.

Scaling Up the Technology
As mentioned herein, the converter out power becomes 4.5 mW when scaling up to 0.6 µm CMOS technology. This value is double the output power in the case of 0.35 µm CMOS technology, which was 2.1 mW. The converter performance based on the technology scaling is simulated to ensure the proper operation of the converter under investigation. The electric potential and the electric field distributions, the converter displacement, and the stress analysis due to the input vibration signal, and the converter output power at different Vip is simulated. Figure 8a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 8b shows a part of the structure which clarifies its details.  Figure 9a-e show the simulation results of the electric potential distribution, electric field distribution, the converter displacement due to the input vibration signal, the stress analysis, and the converter output power at different values of V ip . In Figure 9a, it is clear that the maximum voltage, V max , is 30 V, which numerically verifies the qualitative value in Section 4. Figure 9b displays the maximum electric field, which is 1.83 × 10 6 V/m. It is less than half of the air breakdown electric field, which is 1.5 × 10 6 V/m [46]; thus, the design is safe. In Figure 9c, the maximum displacement is 19.7 µm, which agrees with the analytical value d mon. -d min. = 20 µm-0.25 µm = 19.75 µm in Section 4. Further, regarding Figure 9d, the value of the maximum stress is found to be 0.36 Gpa, which is again smaller than the fracture stress of the polysilicon. Thus, the converter design is safe against fracture. Finally, concerning Figure 9e, it is obvious that the value of the simulated P outmax at V max is 4.5 mW, which is double the value found for 0.35 µm CMOS technology. Figure 9a-e show the simulation results of the electric potential distribution, electric field distribution, the converter displacement due to the input vibration signal, the stress analysis, and the converter output power at different values of Vip. In Figure 9a, it is clear that the maximum voltage, Vmax, is 30 V, which numerically verifies the qualitative value in Section 4. Figure 9b displays the maximum electric field, which is 1.83 × 10 6 V/m. It is less than half of the air breakdown electric field, which is 1.5 × 10 6 V/m [46]; thus, the design is safe. In Figure 9c, the maximum displacement is 19.7 µm, which agrees with the analytical value dmon.-dmin. = 20 µm-0.25 µm = 19.75 µm in Section 4. Further, regarding Figure 9d, the value of the maximum stress is found to be 0.36 Gpa, which is again smaller than the fracture stress of the polysilicon. Thus, the converter design is safe against fracture. Finally, concerning Figure 9e, it is obvious that the value of the simulated Poutmax at Vmax is 4.5 mW, which is double the value found for 0.35 µm CMOS technology.

Technological Parameters Optimization
Here, the converter performance is enhanced by optimizing its technological parameters which are the converter thickness (t), finger width (Wf), and finger length (Lf). Concerning the device thickness (t), recalling Equations (7)-(9) of Ng, Cmax, and Cmin, it is obvious that Cmax and Cmin increase by increasing the device thickness (t). As a result, the output power of the converter increases. In this work, t is selected to be 500 µm, as it is the standard device thickness for SOI technology [19,47]. Concerning the converter finger width (Wf), it is clear using Equation (7) that Ng increases by decreasing Wf. Thus, Cmax, Cmin, and Pout will increase. The converter output power is calculated and simulated for different values of Wf. The optimum value of Wf that achieves the highest output power is found to be 5 µm. Table 2 represents the calculated and simulated values of Pout at different Wf. Figure 10 shows Pout versus Vip at different Wf. It is obvious that Pout increases by decreasing Wf. In this work, the value Wf is set to 10 µm to guarantee the rigidity of the structure.

Technological Parameters Optimization
Here, the converter performance is enhanced by optimizing its technological parameters which are the converter thickness (t), finger width (W f ), and finger length (L f ). Concerning the device thickness (t), recalling Equations (7)-(9) of N g , C max , and C min , it is obvious that C max and C min increase by increasing the device thickness (t). As a result, the output power of the converter increases. In this work, t is selected to be 500 µm, as it is the standard device thickness for SOI technology [19,47]. Concerning the converter finger width (W f ), it is clear using Equation (7) that N g increases by decreasing W f . Thus, C max , C min , and P out will increase. The converter output power is calculated and simulated for different values of W f . The optimum value of W f that achieves the highest output power is found to be 5 µm. Table 2 represents the calculated and simulated values of P out at different W f . Figure 10 shows P out versus V ip at different W f . It is obvious that P out increases by decreasing W f . In this work, the value W f is set to 10 µm to guarantee the rigidity of the structure.  For the converter finger length (Lf), recalling Equations (8) and (9), it is obvious that Cmax and Cmin increase by increasing Lf. Thus, Pout also increases. Table 3 represents the calculated and simulated values of Pout, at different values of Lf [48]. Furthermore, Figure  11 shows Pout versus Vip at different Lf. As is depicted, Pout increases by increasing Lf. In this work, the value Lf is set to 1200 µm, achieving the optimum Pout. Figure 12a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Figure 10. P out versus V ip at different W f . For the converter finger length (L f ), recalling Equations (8) and (9), it is obvious that C max and C min increase by increasing L f . Thus, P out also increases. Table 3 represents the calculated and simulated values of P out , at different values of L f [48]. Furthermore, Figure 11 shows P out versus V ip at different L f . As is depicted, P out increases by increasing L f . In this work, the value L f is set to 1200 µm, achieving the optimum P out . Figure 12a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 12b shows a part of the structure which clarifies its details.  For the converter finger length (Lf), recalling Equations (8) and (9), it is obvious that Cmax and Cmin increase by increasing Lf. Thus, Pout also increases. Table 3 represents the calculated and simulated values of Pout, at different values of Lf [48]. Furthermore, Figure  11 shows Pout versus Vip at different Lf. As is depicted, Pout increases by increasing Lf. In this work, the value Lf is set to 1200 µm, achieving the optimum Pout. Figure 12a demonstrates the 2D converter structure for 0.35 µm CMOS technology by using COMSOL Multiphysics 5.4. Figure 12b shows a part of the structure which clarifies its details.    Figure 13a, which agrees with the analytical value. In addition, the maximum electric field is 1.78 × 10 6 V/m according to Figure 13b, confirming the safety design criterion. Furthermore, the maximum displacement is 19.7 µm, extracted from Figure 13c, which agrees with the analytically calculated value. Furthermore, as can be inferred from Figure 13d, the value of the maximum stress is 0.317 Gpa, revealing the safety against fracture. Finally, Poutmax is 11.2 mW according to Figure 13e, which illustrates the variation of Pout versus Vip. This simulated value also agrees with the analytically calculated value.   Figure 13a, which agrees with the analytical value. In addition, the maximum electric field is 1.78 × 10 6 V/m according to Figure 13b, confirming the safety design criterion. Furthermore, the maximum displacement is 19.7 µm, extracted from Figure 13c, which agrees with the analytically calculated value. Furthermore, as can be inferred from Figure 13d, the value of the maximum stress is 0.317 Gpa, revealing the safety against fracture. Finally, P outmax is 11.2 mW according to Figure 13e, which illustrates the variation of P out versus V ip . This simulated value also agrees with the analytically calculated value.   Figure 13a, which agrees with the analytical value. In addition, the maximum electric field is 1.78 × 10 6 V/m according to Figure 13b, confirming the safety design criterion. Furthermore, the maximum displacement is 19.7 µm, extracted from Figure 13c, which agrees with the analytically calculated value. Furthermore, as can be inferred from Figure 13d, the value of the maximum stress is 0.317 Gpa, revealing the safety against fracture. Finally, Poutmax is 11.2 mW according to Figure 13e, which illustrates the variation of Pout versus Vip. This simulated value also agrees with the analytically calculated value. Remarkably, the most effective technological parameter which significantly influences the converter performance is Lf. Referring to Figure 12, it is not recommended that Lf exceeds 1200 µm [19,47,48]. From fabrication visibility, the converter finger becomes so long that it can be easily broken. Thus, if Lf exceeds 1200 µm, the converter will become fragile. For the converter structure to be optimized, one has to maximize the converter finger length without being fragile.

The Electrostatic MEMS Converter Structure Optimization
Next, the converter performance is enhanced by modifying and optimizing its structure. Figure 14 demonstrates the proposed converter structure which has the following advantages. First, it makes the best use of the wasted shuttle mass area by evacuating its center. Secondly, the finger length increases; thus, the output power also increases. Finally, the converter becomes ridged because of the continuous fingers which are anchored from both sides. Figure 15 shows the simulation results of the proposed converter output power with the input voltage. As depicted in the figure, the output power becomes 14.29 mW. Thus, the proposed structure enhances the converter output Remarkably, the most effective technological parameter which significantly influences the converter performance is L f . Referring to Figure 12, it is not recommended that L f exceeds 1200 µm [19,47,48]. From fabrication visibility, the converter finger becomes so long that it can be easily broken. Thus, if L f exceeds 1200 µm, the converter will become fragile. For the converter structure to be optimized, one has to maximize the converter finger length without being fragile.

The Electrostatic MEMS Converter Structure Optimization
Next, the converter performance is enhanced by modifying and optimizing its structure. Figure 14 demonstrates the proposed converter structure which has the following advantages. First, it makes the best use of the wasted shuttle mass area by evacuating its center. Secondly, the finger length increases; thus, the output power also increases. Finally, the converter becomes ridged because of the continuous fingers which are anchored from both sides. Figure 15 shows the simulation results of the proposed converter output power with the input voltage. As depicted in the figure, the output power becomes 14.29 mW. Thus, the proposed structure enhances the converter output power further by 3 mW.  As a comparison with the cited work in [30], multi-vibrational mode electrostatic energy harvesters have been designed. An output of 2.96 µW at an input vibration frequency of 1.272 kHz has been obtained [30]. Further, a symmetric comb electrode has been used at an input vibration frequency of 125 Hz and an output power of 70 µW has been provided [31]. An electret vibration energy harvester was used which provides an output power of 495µW at an input vibration frequency of 1.2 kHz [32]. Concerning Ref. [47], gap-closing inter-digitated electrodes electrostatic MEMS vibration energy harvesters were used at an input vibration frequency of 120 Hz and gave 3.13 µW of output power. A 2DOF e-VEH MEMS device with impact-induced nonlinearity was utilized where operation at an input vibration frequency of 731 Hz was employed [49]. Such type gives an output power of 14 µW. Moreover, in Ref. [50], a batch-fabricated, low-frequency, and wideband MEMS electrostatic vibration energy harvester has been used at an input vibration frequency of 428 Hz and an output power of 6.6 µW was recorded. Finally, an out-of-plane electret-based vibrational energy harvester was introduced at an input vibration frequency of 95 Hz giving an output power of 0.95 µW [51]. Table 4, summarizes the output power of the proposed electrostatic MEMS converter in comparison with cited studies. It is obvious that the proposed converter using 0.6 µm CMOS technology is promising, as it achieves a high 14.29 mW output power. After exploring the design space of all kinds of parameters, there is an important intrinsic tradeoff and challenges for the proposed electrostatic MEMS converter. Such challenges concern the reduction in the converter area which will effectively reduce its fabrication cost. Previously, there was a tradeoff between reducing the converter area to reduce the  As a comparison with the cited work in [30], multi-vibrational mode electrostatic energy harvesters have been designed. An output of 2.96 µW at an input vibration frequency of 1.272 kHz has been obtained [30]. Further, a symmetric comb electrode has been used at an input vibration frequency of 125 Hz and an output power of 70 µW has been provided [31]. An electret vibration energy harvester was used which provides an output power of 495µW at an input vibration frequency of 1.2 kHz [32]. Concerning Ref. [47], gap-closing inter-digitated electrodes electrostatic MEMS vibration energy harvesters were used at an input vibration frequency of 120 Hz and gave 3.13 µW of output power. A 2DOF e-VEH MEMS device with impact-induced nonlinearity was utilized where operation at an input vibration frequency of 731 Hz was employed [49]. Such type gives an output power of 14 µW. Moreover, in Ref. [50], a batch-fabricated, low-frequency, and wideband MEMS electrostatic vibration energy harvester has been used at an input vibration frequency of 428 Hz and an output power of 6.6 µW was recorded. Finally, an out-of-plane electret-based vibrational energy harvester was introduced at an input vibration frequency of 95 Hz giving an output power of 0.95 µW [51]. Table 4, summarizes the output power of the proposed electrostatic MEMS converter in comparison with cited studies. It is obvious that the proposed converter using 0.6 µm CMOS technology is promising, as it achieves a high 14.29 mW output power. After exploring the design space of all kinds of parameters, there is an important intrinsic tradeoff and challenges for the proposed electrostatic MEMS converter. Such challenges concern the reduction in the converter area which will effectively reduce its fabrication cost. Previously, there was a tradeoff between reducing the converter area to reduce the As a comparison with the cited work in [30], multi-vibrational mode electrostatic energy harvesters have been designed. An output of 2.96 µW at an input vibration frequency of 1.272 kHz has been obtained [30]. Further, a symmetric comb electrode has been used at an input vibration frequency of 125 Hz and an output power of 70 µW has been provided [31]. An electret vibration energy harvester was used which provides an output power of 495µW at an input vibration frequency of 1.2 kHz [32]. Concerning Ref. [47], gap-closing inter-digitated electrodes electrostatic MEMS vibration energy harvesters were used at an input vibration frequency of 120 Hz and gave 3.13 µW of output power. A 2DOF e-VEH MEMS device with impact-induced nonlinearity was utilized where operation at an input vibration frequency of 731 Hz was employed [49]. Such type gives an output power of 14 µW. Moreover, in Ref. [50], a batch-fabricated, low-frequency, and wideband MEMS electrostatic vibration energy harvester has been used at an input vibration frequency of 428 Hz and an output power of 6.6 µW was recorded. Finally, an out-of-plane electret-based vibrational energy harvester was introduced at an input vibration frequency of 95 Hz giving an output power of 0.95 µW [51]. Table 4, summarizes the output power of the proposed electrostatic MEMS converter in comparison with cited studies. It is obvious that the proposed converter using 0.6 µm CMOS technology is promising, as it achieves a high 14.29 mW output power. After exploring the design space of all kinds of parameters, there is an important intrinsic tradeoff and challenges for the proposed electrostatic MEMS converter. Such challenges concern the reduction in the converter area which will effectively reduce its fabrication cost. Previously, there was a tradeoff between reducing the converter area to reduce the fabrication cost which greatly degrades the converter performance, mainly its output power. In our promising proposed converter, a proposed solution to such an issue is introduced. The reason is that our converter generates a relatively high output power when compared with the recent research. Thus, based on the application, its area can be reduced while maintaining the satisfactory output power which was not applied before. In addition, there was a main challenge faced by the converter which is its fragility after fabrication. This is because the finger length must be large to achieve higher output power. Thus, the finger can be easily broken. However, our promising proposed converter is less fragile and more ridged. The reason is that the converter fingers are attached from two sides in a structure that looks like a net, as shown in Figure 4. Thus, it will not suffer from being broken. Table 4. Performance parameters comparison of different electrostatic harvesters.

This work
In-plane gap-closing converter using 0.6 µm CMOS technology 2.5 4.5

This work
In-plane gap-closing proposed converter using 0.6 µm CMOS technology 2.5 14.29

Conclusions
In this work, the electrostatic MEMS converter performance is enhanced by using three effective techniques. Firstly, the converter output power is boosted by scaling up the technology of its accompanied CMOS circuit, the power conditioning and power controlling circuits, from 0.35 µm to 0.6 µm CMOS technology. The maximum voltage of the energy harvesting system, V max , is the most effective system constraint that increases from 8 V to 30 V. Thus, the converter output power is doubled from 2.1 mW to 4.5 mW. Secondly, the converter output power increases by optimizing its technological parameters, the converter thickness and the converter finger width and length. The optimum values of the converter parameters which achieve the optimum output power are t equals 500 µm, W f is selected to be 10 µm, and L f equals 1200 µm. Thus, the converter output power increased from 4.5 mW to 11.2 mW. From such optimization, L f is found to be the most effective technological parameter which affects the converter performance. It is recommended to maximize L f ; however, this objective cannot be achieved with the traditional electrostatic MEMS converter as long as L f increases and the converter becomes fragile. The third optimization technique aims to maximize the converter finger length by optimizing the converter structure. A proposed structure aims to overcome the wasted area of the shuttle mass and maximize L f by anchoring it from both sides. Thus, the converter becomes more ridged. The proposed structure enhances the converter output power from 11.2 to 14.29 mW. All the simulations are carried out by using COMSOL Multiphysics 5.4. In future work, the bandwidth broadening of the electrostatic MEMS converter will be investigated. Thus, the converter will resist performance degradation due to any shift in its resonant frequency.